Step size determination approach for aging simulations in analog ICs - Afacan, Engin (VDE VERLAG GMBH, 2021)
Simulation of time-dependent variations is quite complicated since the degradation is a function of time, where the time step directly affects the accuracy and the efficiency of the analysis. Commercial tools use a constant step count during simulations, in which choosing a large step count may degrade the efficiency whereas keeping it small may result in accuracy problems. To overcome this problem, a couple of different adaptive time-step approaches have been proposed in the literature. Nevertheless, they suffer from the initial workload during step count determination or some other accuracy problems. In this study, we present a two-level step count determination approach. At the first level, the step count induced estimation error can be promptly determined via an effective simulation strategy. At the second level, the error is fitted into a saturated power law model; thus, the efficient step count can be determined without any simulation effort. The proposed approach provides a remarkable save in computation time and can be used for all analog circuits without loss of generality. © 2021 Elsevier B.V., All rights reserved.
2021 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2021 and 16th Conference on PhD Research in Microelectronics and Electronics, PRIME 2021 -- Virtual, Online -- 172054
Keywords: Analog integrated circuits; Timing circuits; Accuracy problems; Adaptive time step; Ageing simulation; Commercial tools; Function of time; Level steps; Step size determinations; Time dependent variations; Time step; Tool use; Efficiency