Simulated annealing assisted NSGA-III-based multi-objective analog IC sizing tool

Abstract

Over the last few decades, several CAD tools using random search techniques have been developed to find a set of optimum solutions for analog IC design. Although most of these tools have been successful for one or two objective designs, they tend to become ineffective to fulfill the requirements of the desired Pareto-Optimal Front (POF) for many and multi-objective (MO) problems. To address this issue, we propose a novel multi-objective analog circuit optimization tool that employs a hybrid guided random search technique. We adapted the Non dominated Sorting Genetic Algorithm 3 (NSGA-III) to the analog circuit sizing problem and combined it with simulated annealing (SA) based single-objective (SO) genetic algorithm (GA). This implementation enables the construction of homogeneous POFs in many-dimensional objective spaces. To our best knowledge, this is the first implementation of the NSGA-III in analog electronic design automation (EDA). For demonstration purposes, we optimized two OTA circuits by using the proposed tool, the standard NSGA-III and SPEA-2 based analog circuit optimizers. According to the synthesis results, the proposed tool and 2-objective NSGAIII outperform 2-objective SPEA-2 in terms of POF quality. Specifically, our proposed tool achieved the best results in the maximum spread metrics, outperforming both 2-objective NSGA-III and SPEA2 in all case studies. Furthermore, the number of total simulations required by our method for 3-objective problems is in the same order of magnitude compared to the state-of-the-art methods for 2-objective problems.