A new architecture for emulating CNN with template learning on FPGA
| dc.contributor.author | Kose, Erdem | |
| dc.contributor.author | Yalcin, Mustak Erhan | |
| dc.date.accessioned | 2025-10-29T12:10:19Z | |
| dc.date.issued | 2018 | |
| dc.department | Gebze Teknik Üniversitesi | |
| dc.description | 16th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2018 -- Budapest -- 151850 | |
| dc.description.abstract | —Cellular Neural Network with time invariant weights is being used in computer vision applications. There are many ways to implement CNNs for real time image processing. VLSI and FPGA technologies are getting better day by day. In our study we improved our previous system-on-chip implementation of CNNs. Improved CNN system-on-chip processor is built on an improved CNN emulator design and a better processor core which performs a new template learning algorithm is shown. SoC is programmed to perform a sequential CNN operations on different input and state images with different templates which are now can be stored in DDR2 RAM. Upgraded system design allows that templates can be more dynamically updated by the new learning algoritm in run time. System is implemented on Spartan 6 FPGA and tests results are presented and compared. © 2019 Elsevier B.V., All rights reserved. | |
| dc.description.sponsorship | Institute of Computer Science and Control of the Hungarian Academy of Sciences; Pazmany Peter Catholic University | |
| dc.identifier.isbn | 9781665439480 | |
| dc.identifier.isbn | 9781479964680 | |
| dc.identifier.isbn | 9798350308921 | |
| dc.identifier.isbn | 9783800747665 | |
| dc.identifier.isbn | 9781467302890 | |
| dc.identifier.isbn | 9783800742523 | |
| dc.identifier.issn | 2165-0179 | |
| dc.identifier.issn | 2165-0160 | |
| dc.identifier.scopus | 2-s2.0-85064893866 | |
| dc.identifier.scopusquality | N/A | |
| dc.identifier.startpage | 103 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.14854/15085 | |
| dc.identifier.volume | 2018-August | |
| dc.indekslendigikaynak | Scopus | |
| dc.language.iso | en | |
| dc.publisher | IEEE Computer Society help@computer.org | |
| dc.relation.ispartof | International Workshop on Cellular Nanoscale Networks and their Applications | |
| dc.relation.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | |
| dc.rights | info:eu-repo/semantics/closedAccess | |
| dc.snmz | KA_Scopus_20251020 | |
| dc.subject | Cellular neural networks | |
| dc.subject | Field programmable gate arrays (FPGA) | |
| dc.subject | Image processing | |
| dc.subject | Learning algorithms | |
| dc.subject | Learning systems | |
| dc.subject | Nanotechnology | |
| dc.subject | Programmable logic controllers | |
| dc.subject | System-on-chip | |
| dc.subject | Computer vision applications | |
| dc.subject | Emulator designs | |
| dc.subject | FPGA technology | |
| dc.subject | Real-time image processing | |
| dc.subject | System-on-chip implementation | |
| dc.subject | System-on-chip processors | |
| dc.subject | Template learning | |
| dc.subject | Upgraded systems | |
| dc.subject | Integrated circuit design | |
| dc.title | A new architecture for emulating CNN with template learning on FPGA | |
| dc.type | Conference Object |









