A novel low-hardware-cost scan chain architecture resilient to scanSAT attack

Abstract

Logic locking serves to protect a hardware design from an untrusted fabrication facility. A manufacturer may bypass the protection by performing a SAT attack by making use of the scan chain structure, which was designed to increase the testability of ICs. One way to prevent such attacks is to encrypt the scan chain using a cryptographic algorithm. However, adding dedicated encryption modules into the IC increases the cost. In this study, we reduced this cost by reusing the scan chain structure to be able to implement a cryptographic algorithm, the Trivium algorithm. Our implementation allows production, functional and mission mode field tests to be performed by an unreliable tester.