Design Space Exploration and Topology Assessment of Low-Power Sleep Comparators Using Evolutionary Algorithms

Abstract

The design of low-power sleep comparators involves a compulsive trade-off between key performance metrics such as power consumption and delay, particularly under varying input voltage slew rates. To systematically determine the best-performing comparator topology, this study proposes using a Multi-Objective Optimization (MOO) approach. By exploring the entire design space, the generated delay vs. power Pareto fronts enable a comprehensive comparison of multiple comparator architectures under the same constraints. This approach provides valuable design insights, revealing which topology consistently offers the best trade-offs between power efficiency and response speed not only for a single design point, but also for the whole design space. © 2025 Elsevier B.V., All rights reserved.