A Comprehensive Performance Space Comparison of Bandgap Reference Circuits Through Hard Constrained Analog Circuit Multi-Objective Optimization

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Institute of Electrical and Electronics Engineers Inc.

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info:eu-repo/semantics/closedAccess

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As the demand for ICs continues to surge, there is an imperative need to expedite the circuit design process. Addressing this challenge has led to the growing popularity of automation and optimization tools. Nevertheless, the optimization of nonlinear circuits, such as BGRs, presents inherent complexities. This paper presents a detailed comparison of two different circuit BGR topologies (CMOS-only and Banba's BGR) through multi-objective optimization while adhering to identical and hard constraints. Through this approach, a rigorous comparison is conducted between these two circuits, extending beyond the scope of a single design to encompass the entire design space. This comprehensive analysis provides valuable insights into the performance of these circuit topologies. The results reveal that a CMOS-only circuit topology outperformed Banba's BGR in terms of temperature variations, power consumption, and noise performance. On the other hand, Banba's BGR exhibits better performance in line sensitivity and Power Supply Rejection (PSR). To our best knowledge, this paper stands as the first endeavor to thoroughly investigate and draw a comprehensive performance comparison between CMOS-only and Banba's BGR. © 2024 Elsevier B.V., All rights reserved.

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14th International Conference on Electrical and Electronics Engineering, ELECO 2023 -- Virtual, Bursa -- 197135

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Analog circuits, CMOS integrated circuits, Constrained optimization, Electric network analysis, Integrated circuit design, Integrated circuit manufacture, Timing circuits, Topology, Automation tools, Bandgap Reference, Circuit designs, Comprehensive performance, Design-process, Multi-objectives optimization, Optimization tools, Performance, Performance spaces, Reference circuits, Multiobjective optimization

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